Physical Design Engineer | ASIC Physical Design Engineer (PnR/STA)

This role is about owning the silicon journey from floorplan to signoff. 5–8 years in physical design and SoC implementation Strong experience in Cadence tools: Innovus, Tempus, Voltus, Quantus Hands-on with floorplanning, PnR, STA, and EM/IR closure Proven ability to meet aggressive PPA targets Exp